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Total Phase SPI Active Level 3 - 80MHz

Total Phase SPI Active Level 3 - 80MHz
Promira Software Application

Protocol: SPI

Total Phase SPI Active Level 3 - 80MHz, TP600710. This application provides state-of-the-art SPI host adapter functionality for the Promira Serial Platform.

This application provides state-of-the-art host adapter functionality. With this application you will be able to actively exercise your SPI bus in many ways.

The SPI Active - Level 3 Application is a download that runs on your Promira Serial Platform unit. Once you have purchased a Promira Serial Platform unit, you'll be able to instantly download and add new applications as they become available.
All applications include one full year of software maintenance. As long as your software maintenance is current, you can take advantage of our five-star support. Any time you purchase a new application for your Promira Serial Platform, we'll automatically extend the software maintenance for all applications that have current maintenance support (applications that are out of support do not receive this benefit, so it's always best to keep the maintenance current on your applications). That means if you purchase one new application per year, all your applications will be eligible for software support.

Total Phase

Total Phase SPI Active Level 3 - 80MHz
Promira Software Application

Protocol: SPI

Variant

art : TP600710

€ 1 000 excl. VAT

€ 1 250 incl. VAT

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More information

Operates in master or slave mode	Yes
Master signaling rate	Up to 80 Mbps
Slave signaling rate	Up to 20 Mbps
Full duplex master transmit/receive	Yes
Asynchronous slave transmit/receive	Yes
Software configurable target power pins to power downstream devices	Yes
Software configurable Slave Select (SS) polarity in master mode	Yes

Please Note	This is an application that requires installation on the Promira Serial Platform. Pre-requisites to using this application are: SPI Active – Level 1 Application and SPI Active – Level 2 Application
Features	Full support for Single, Dual and Quad I/O SPI Master at speeds up to 80 MHz Slave at speeds up to 20 MHz Each slave response size of up to 256 bytes Program EEPROM, Flash, or other SPI memory - including Single, Dual and Quad I/O programming Use up to 16 GPIOs Up to 8 Slave Selects (configurable, shared with GPIO) Software configurable Slave Select (SS) polarity in master mode Provide up to 200 mA of power to your embedded project - with 2 independent target Power supplies Operates with voltages from 0.9 V - 3.45 V, 5 V fault tolerant
	The all-new architecture of the SPI Active - Level 3 Application running on the Promira Serial Platform provides superior performance. With many new embedded features such as integrated voltage level-shifting, advanced message queuing, High-speed USB or Ethernet connectivity to your analysis PC and many more, debugging or programming your SPI system has never been easier or faster.
	Once you're running the SPI Active - Level 3 Application on your Promira platform you can create your own interface using Total Phase's robust API or select from our no charge GUIs: Control Center Serial or Flash Center to control your SPI data.
	The purchase of your SPI Active - Level 2 Application includes one year of support, allowing you to download any updates for this application for 12 months after purchase.
Bit Rate	SPI Master: 31 KHz - 80 MHz† SPI Slave: 31 KHz - 20 MHz
Target Bus Interface	SPI Master/Slave Up to 16 configurable GPIOs
DC Characteristics (Promira)	Target Power: +5V, 100 mA max (pins 4 and 6) Supplementary I/O Power: 0.9 V - 3.45 V, 100 mA max (pins 22 and 24)
SPI	Operates in master or slave mode Up to 80 Mbps† master signaling rate Up to 20 Mbps slave signaling rate Full/half duplex master transmit/receive Asynchronous slave transmit/receive Software configurable target power pins to power downstream devices Software configurable Slave Select (SS) polarity in master mode † Actual system bus speed may vary as a function of capacitance.
GPIO - General Purpose IO	GPIO functionality can also be combined with I2C or SPI to interact with your target system. GPIO configuration is cached internally to preserve settings between operational modes.